Low Power Design

[Part 1]

Next: Solving the power puzzle

Why is conserving power becoming important now?

Power conservation and low power design are all the buzzwords these days. Designing with low power requirements has been always an important aspect of consumer and mobile applications. The less power your device - mobile phone, personal music player, and so on - consumes, the longer it can be run on batteries between two recharges. As the consumer electronics space grows exponentially, there is no better time for those applications to consume less power and be appealing to even more customers.

But the quest for low power design in the mobile device space is nothing new. There is another overarching reason why the low power design is becoming so important today. And that reason is the increase of leakage current with the shrinkage of device geometry. The leakage current is the current that flows from the drain to source of a transistor whether it is in the ON state or not.

To see how this works, consider a chip designed using a 180 nanometer (0.18 micron) process. In this case, the only prevalent source of power dissipation is that due to switching of transistors.

The situation changes radically when we go to 130 nanometer process and smaller. At smaller geometry, the supply voltages and the threshold voltages decrease. This causes the sub-threshold current to increase exponentially (approximately 10 times per technology node). For example, at 130 nanometers with supply voltage of 1.2 - 1.3V, leakage current represents 10-30% of the active power. At 70 nanometers with supply voltage of 0.9 - 1.0V, leakage current is 50% of the power dissipation of the chip. What once was a problem for the microprocessor designers is now knocking on the doors of mainstream ASIC design.

Clock gating will not solve this problem

The strategy for reducing power consumption that worked at 180 nanometers or above will not work for smaller geometry anymore. For instance, a common method for reducing power at larger geometry is to shut the clock to a specific block that is not required to be operational at certain stage thus preventing the switching of the transistors.

Since leakage current does not stop if the transistors stop switching, this method is ineffective at small geometry processes.

Next: Solving the power puzzle


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